The ring buffers work is exciting, but a buried lede is that they also have QNX-style IPC now:
Direct context switching was implemented in kernel MR 694, resulting in a 15-20% IPC latency reduction. It separates the current context (reference) into the scheduled context and the running context, where the former is the context owning the current timeslice, and the latter is the context whose registers/memory/file table is currently active. When direct switching has not occurred, these always coincide.
m0th | 22 hours ago
The ring buffers work is exciting, but a buried lede is that they also have QNX-style IPC now: